Linux ARM 的内核 Oops 页面错误错误代码

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时间:2020-08-06 17:44:34  来源:igfitidea点击:

Kernel Oops page fault error codes for ARM

linuxlinux-kernelarmfault

提问by shunty

What does error code after Oops give information about the panic in arm ex. Oops: 17 [#1] PREEMPT SMPwhat 17 give information in this case. In x86 it represents -

Oops 之后的错误代码提供了有关 arm ex 中的 panic 的信息。 Oops: 17 [#1] PREEMPT SMPwhat 17 在这种情况下提供信息。在 x86 中它代表 -

  • bit 0 == 0: no page found 1: protection fault

  • bit 1 == 0: read access 1: write access

  • bit 2 == 0: kernel-mode access 1: user-mode access

  • bit 3 == 1: use of reserved bit detected

  • bit 4 == 1: fault was an instruction fetch
  • bit 0 == 0: no page found 1: protection fault

  • bit 1 == 0: read access 1: write access

  • bit 2 == 0: kernel-mode access 1: user-mode access

  • bit 3 == 1: use of reserved bit detected

  • bit 4 == 1: fault was an instruction fetch

But i am not able to find any information in arm.

但我无法在 arm 中找到任何信息。

Thanks Shunty

谢谢顺蒂

回答by auselen

What you printed above as description of bits is page fault descriptions, not Oops faults.

您在上面打印的位描述是页面错误描述,而不是糟糕的错误。

See Linux's oops-tracingfor more information on looking for Linux crash analysis.

有关查找 Linux 崩溃分析的更多信息,请参阅 Linux 的oops-tracing

Below is how your Oops: 17 [#1] PREEMPT SMParch/arm/kernel/traps.c:

以下是您的Oops: 17 [#1] PREEMPT SMParch/arm/kernel/traps.c

    #define S_PREEMPT " PREEMPT"
    ...
    #define S_SMP " SMP"
    ...
    printk(KERN_EMERG "Internal error: %s: %x [#%d]" S_PREEMPT S_SMP S_ISA "\n", str, err, ++die_counter);

Page faults doesn't need to crash the kernel, as well as not all kernel crashes are page faults. So there is a high chance Oops: 17is not related to page faults at all. (and as a bonus my wild guess is it is about scheduling / just sounds familiar to me.)

页面错误不需要使内核崩溃,而且并非所有内核崩溃都是页面错误。所以很有可能Oops: 17根本与页面错误无关。(作为奖励,我的疯狂猜测是关于日程安排/对我来说听起来很熟悉。)

回答by kaiwan

Looks like you're asking about the ARM Fault Status Register (FSR)bits. I looked up the kernel code (arch/arm/mm/fault.c) and found that this is what is actually passed as a parameter to the Oops code:

看起来您是在询问ARM 故障状态寄存器 (FSR)位。我查了一下内核代码(arch/arm/mm/fault.c),发现这实际上是作为参数传递给Oops代码的:

    static void
    __do_kernel_fault(struct mm_struct *mm, unsigned long addr, unsigned int fsr,
              struct pt_regs *regs)
    {
    [...]
        pr_alert("Unable to handle kernel %s at virtual address %08lx\n",
             (addr < PAGE_SIZE) ? "NULL pointer dereference" :
             "paging request", addr);

        show_pte(mm, addr);
        die("Oops", regs, **fsr**);
   [...]
   }

So, anyway, this I traced to the FSR register on the ARM(v4 and above?) MMU:

所以,无论如何,我追踪到 ARM(v4 及更高版本?)MMU 上的 FSR 寄存器:

Source: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0438d/BABFFDFD.html

来源:http: //infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0438d/BABFFDFD.html

...
    [3:0]   FS[3:0] 
    Fault Status bits. This field indicates the type of exception generated. Any encoding not listed is reserved:
    b00001
       Alignment fault.
    b00100
       Instruction cache maintenance fault[a].
    b01100
       Synchronous external abort on translation table walk, 1st level.
    b01110
       Synchronous external abort on translation table walk, 2nd level.
    b11100
       Synchronous parity error on translation table walk, 1st level.
    b11110
       Synchronous parity error on translation table walk, 2nd level.
    b00101
       Translation fault, 1st level.
    b00111
       Translation fault, 2nd level.
    b00011
       Access flag fault, 1st level.
    b00110
       Access flag fault, 2nd level.
    b01001
       Domain fault, 1st level.
    b01011
       Domain fault, 2nd level.
    b01101
       Permission fault, 1st level.
    b01111
       Permission fault, 2nd level.
    b00010
       Debug event.
    b01000
       Synchronous external abort, non-translation.
    b11001
       Synchronous parity error on memory access.
    b10110
       Asynchronous external abort.
    b11000
       Asynchronous parity error on memory access.

...

...

Disclaimer: I don't know whether this info is still relevant; the doc states it's for the ARM Cortex A15 and the page is marked as Superseded.

免责声明:我不知道这些信息是否仍然相关;该文档指出它适用于 ARM Cortex A15,并且该页面被标记为已被取代。

Could see this page also: ARM926EJ-S Fault address and fault status registers

也可以看到这个页面: ARM926EJ-S Fault address and fault status registers